diff options
| author | Damien Miller <djm@mindrot.org> | 2000-09-16 13:29:08 +1100 |
|---|---|---|
| committer | Damien Miller <djm@mindrot.org> | 2000-09-16 13:29:08 +1100 |
| commit | e4340be5b3ff16f4d9ba5e3ea7e449dc1b6fa7a8 (patch) | |
| tree | aba9e2ae234edeb888b922c6a13b755c1248deea /crc32.c | |
| parent | f384c366d33cb435627743f7ea0ed3f966543d40 (diff) | |
- (djm) Merge OpenBSD changes:
- markus@cvs.openbsd.org 2000/09/05 02:59:57
[session.c]
print hostname (not hushlogin)
- markus@cvs.openbsd.org 2000/09/05 13:18:48
[authfile.c ssh-add.c]
enable ssh-add -d for DSA keys
- markus@cvs.openbsd.org 2000/09/05 13:20:49
[sftp-server.c]
cleanup
- markus@cvs.openbsd.org 2000/09/06 03:46:41
[authfile.h]
prototype
- deraadt@cvs.openbsd.org 2000/09/07 14:27:56
[ALL]
cleanup copyright notices on all files. I have attempted to be
accurate with the details. everything is now under Tatu's licence
(which I copied from his readme), and/or the core-sdi bsd-ish thing
for deattack, or various openbsd developers under a 2-term bsd
licence. We're not changing any rules, just being accurate.
- markus@cvs.openbsd.org 2000/09/07 14:40:30
[channels.c channels.h clientloop.c serverloop.c ssh.c]
cleanup window and packet sizes for ssh2 flow control; ok niels
- markus@cvs.openbsd.org 2000/09/07 14:53:00
[scp.c]
typo
- markus@cvs.openbsd.org 2000/09/07 15:13:37
[auth-options.c auth-options.h auth-rh-rsa.c auth-rsa.c auth.c]
[authfile.h canohost.c channels.h compat.c hostfile.h log.c match.h]
[pty.c readconf.c]
some more Copyright fixes
- markus@cvs.openbsd.org 2000/09/08 03:02:51
[README.openssh2]
bye bye
- deraadt@cvs.openbsd.org 2000/09/11 18:38:33
[LICENCE cipher.c]
a few more comments about it being ARC4 not RC4
- markus@cvs.openbsd.org 2000/09/12 14:53:11
[log-client.c log-server.c log.c ssh.1 ssh.c ssh.h sshd.8 sshd.c]
multiple debug levels
- markus@cvs.openbsd.org 2000/09/14 14:25:15
[clientloop.c]
typo
- deraadt@cvs.openbsd.org 2000/09/15 01:13:51
[ssh-agent.c]
check return value for setenv(3) for failure, and deal appropriately
Diffstat (limited to 'crc32.c')
| -rw-r--r-- | crc32.c | 83 |
1 files changed, 38 insertions, 45 deletions
| @@ -1,55 +1,48 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * The implementation here was originally done by Gary S. Brown. | 2 | * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or |
| 3 | * I have borrowed the tables directly, and made some minor changes | 3 | * code or tables extracted from it, as desired without restriction. |
| 4 | * to the crc32-function (including changing the interface). | 4 | * |
| 5 | * //ylo | 5 | * First, the polynomial itself and its table of feedback terms. The |
| 6 | * polynomial is | ||
| 7 | * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 | ||
| 8 | * | ||
| 9 | * Note that we take it "backwards" and put the highest-order term in | ||
| 10 | * the lowest-order bit. The X^32 term is "implied"; the LSB is the | ||
| 11 | * X^31 term, etc. The X^0 term (usually shown as "+1") results in | ||
| 12 | * the MSB being 1 | ||
| 13 | * | ||
| 14 | * Note that the usual hardware shift register implementation, which | ||
| 15 | * is what we're using (we're merely optimizing it by doing eight-bit | ||
| 16 | * chunks at a time) shifts bits into the lowest-order term. In our | ||
| 17 | * implementation, that means shifting towards the right. Why do we | ||
| 18 | * do it this way? Because the calculated CRC must be transmitted in | ||
| 19 | * order from highest-order term to lowest-order term. UARTs transmit | ||
| 20 | * characters in order from LSB to MSB. By storing the CRC this way | ||
| 21 | * we hand it to the UART in the order low-byte to high-byte; the UART | ||
| 22 | * sends each low-bit to hight-bit; and the result is transmission bit | ||
| 23 | * by bit from highest- to lowest-order term without requiring any bit | ||
| 24 | * shuffling on our part. Reception works similarly | ||
| 25 | * | ||
| 26 | * The feedback terms table consists of 256, 32-bit entries. Notes | ||
| 27 | * | ||
| 28 | * The table can be generated at runtime if desired; code to do so | ||
| 29 | * is shown later. It might not be obvious, but the feedback | ||
| 30 | * terms simply represent the results of eight shift/xor opera | ||
| 31 | * tions for all combinations of data and CRC register values | ||
| 32 | * | ||
| 33 | * The values must be right-shifted by eight bits by the "updcrc | ||
| 34 | * logic; the shift must be unsigned (bring in zeroes). On some | ||
| 35 | * hardware you could probably optimize the shift in assembler by | ||
| 36 | * using byte-swap instructions | ||
| 37 | * polynomial $edb88320 | ||
| 6 | */ | 38 | */ |
| 7 | 39 | ||
| 40 | |||
| 8 | #include "includes.h" | 41 | #include "includes.h" |
| 9 | RCSID("$OpenBSD: crc32.c,v 1.6 2000/08/19 02:17:12 deraadt Exp $"); | 42 | RCSID("$OpenBSD: crc32.c,v 1.7 2000/09/07 20:27:51 deraadt Exp $"); |
| 10 | 43 | ||
| 11 | #include "crc32.h" | 44 | #include "crc32.h" |
| 12 | 45 | ||
| 13 | /* ============================================================= */ | ||
| 14 | /* COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or */ | ||
| 15 | /* code or tables extracted from it, as desired without restriction. */ | ||
| 16 | /* */ | ||
| 17 | /* First, the polynomial itself and its table of feedback terms. The */ | ||
| 18 | /* polynomial is */ | ||
| 19 | /* X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 */ | ||
| 20 | /* */ | ||
| 21 | /* Note that we take it "backwards" and put the highest-order term in */ | ||
| 22 | /* the lowest-order bit. The X^32 term is "implied"; the LSB is the */ | ||
| 23 | /* X^31 term, etc. The X^0 term (usually shown as "+1") results in */ | ||
| 24 | /* the MSB being 1. */ | ||
| 25 | /* */ | ||
| 26 | /* Note that the usual hardware shift register implementation, which */ | ||
| 27 | /* is what we're using (we're merely optimizing it by doing eight-bit */ | ||
| 28 | /* chunks at a time) shifts bits into the lowest-order term. In our */ | ||
| 29 | /* implementation, that means shifting towards the right. Why do we */ | ||
| 30 | /* do it this way? Because the calculated CRC must be transmitted in */ | ||
| 31 | /* order from highest-order term to lowest-order term. UARTs transmit */ | ||
| 32 | /* characters in order from LSB to MSB. By storing the CRC this way, */ | ||
| 33 | /* we hand it to the UART in the order low-byte to high-byte; the UART */ | ||
| 34 | /* sends each low-bit to hight-bit; and the result is transmission bit */ | ||
| 35 | /* by bit from highest- to lowest-order term without requiring any bit */ | ||
| 36 | /* shuffling on our part. Reception works similarly. */ | ||
| 37 | /* */ | ||
| 38 | /* The feedback terms table consists of 256, 32-bit entries. Notes: */ | ||
| 39 | /* */ | ||
| 40 | /* The table can be generated at runtime if desired; code to do so */ | ||
| 41 | /* is shown later. It might not be obvious, but the feedback */ | ||
| 42 | /* terms simply represent the results of eight shift/xor opera- */ | ||
| 43 | /* tions for all combinations of data and CRC register values. */ | ||
| 44 | /* */ | ||
| 45 | /* The values must be right-shifted by eight bits by the "updcrc" */ | ||
| 46 | /* logic; the shift must be unsigned (bring in zeroes). On some */ | ||
| 47 | /* hardware you could probably optimize the shift in assembler by */ | ||
| 48 | /* using byte-swap instructions. */ | ||
| 49 | /* polynomial $edb88320 */ | ||
| 50 | /* */ | ||
| 51 | /* -------------------------------------------------------------------- */ | ||
| 52 | |||
| 53 | static unsigned int crc32_tab[] = { | 46 | static unsigned int crc32_tab[] = { |
| 54 | 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L, | 47 | 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L, |
| 55 | 0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L, | 48 | 0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L, |